利用蝕刻矽基版表面提高元件發光效率之方法
  ‧ 專利名稱 利用蝕刻矽基版表面提高元件發光效率之方法
  ‧ 專利證書號 201062
US6,905,977B2
  ‧ 專利權人 國立臺灣大學
  ‧ 專利國家
    (申請日)
中華民國 (2003/02/25)
美國 (2003/03/26)
  ‧ 發明人 林清富 , 梁奕智 , 黃武平 , 謝信弘 ,
 
技術摘要:
本發明係揭露一種利用蝕刻矽基板表面提高元件發光效率之方法,其係在形成奈米粒子層以及導電層之前,先利用化學蝕刻移除矽基板表面能階或表面缺限,以減少矽基板表面的非幅射式電子電洞之復合中心,令金氧矽發光元件的幅射式電子電洞之復合比例提高,使得金氧矽結構產生光時,發光效率大幅提高。且該蝕刻步驟亦可在基板上造成奈米級的表面結構,以提高電子電洞對與聲子碰撞機率,並使得發光效率相對增強。五、(一)、本案代表圖為:第___一(d)___圖
(二)、本案代表圖之元件代表符號簡單說明:
10 半導體矽基板
12 奈米粒子層
14 氧化鋁層
16 金屬層

The present invention discloses a method of improving an electroluminescent efficiency of a MOS device by etching a semiconductor substrate thereof. A chemical etching process is performed to remove surface states or surface defects located on the surface of a silicon substrate before a nanoparticle layer and a conducting layer is formed on the silicon substrate, in order that the non-radiative electron-hole recombination centers located on the surface of silicon substrate is suppressed. Accordingly, the percentage of radiative electron-hole recombination is heightened and the electroluminescent efficiency of a MOS light emitting device is drastically enhanced. Advantageously, the chemical etching step is able to create a nanostructure on the surface of the silicon substrate to increase the probability of the collision of electron-hole pairs and phonons, and the electroluminescent efficiency of a MOS light emitting device is improved as well.




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