 技術摘要： |
一種展頻時脈產生器，可產生並調整一輸出時脈信號之一展頻量，此展頻時脈產生器含有三角波調變器、三角波積分器、除頻器以及鎖相迴路。三角波調變器依照數位並列信號產生代表一小數的數位調變信號，其中數位並列信號係相應於展頻量。三角波積分器電性連接三角波調變器，此三角波積分器依照數位調變信號產生含有小數以及整數之除頻器除數。除頻器依據除頻器除數除頻輸出時脈信號，以產生一除頻後時脈信號，其中除頻後時脈信號之頻率大致上等於輸出時脈信號之頻率除以除頻器除數。鎖相迴路依據除頻後時脈信號以及參考時脈信號，調整輸出時脈信號之頻率。
A spread spectrum clock generator includes a triangular modulator, a delta sigma modulator, a frequency divider, and a phase lock loop. The triangular modulator generates a digital modulation signal, representing a decimal, according to a digital parallel signal, in which the spread amount is in proportion to the digital parallel signal. The delta sigma modulator, electrically connected to the triangular modulator, generates a divider divisor, including the decimal and an integer, according to the digital modulation signal. The frequency divider divides the frequency of the output signal clock according to the divider divisor to generate a divided clock signal, in which the frequency of the divided clock signal is substantially equal to a quotient result from dividing the frequency of the output clock signal with the divider divisor. The phase lock loop adjusts the frequency of the output clock signal according to the divided clock signal and a reference clock signal.
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聯繫方式 |
| 聯絡人：
研發處產學合作總中心 |
電話：
(02)3366-9949 |
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| 地 址：
10617臺北市大安區羅斯福路四段1號 禮賢樓六樓608室 |
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