技術摘要 / Our Technology: |
本發明係藉由偵測電晶體的累積區電流的大小來判斷其邏輯狀態。一般的薄膜式電晶體(TFT)的製程中,在沉積非晶矽薄膜後,利用雷射熱退火使該非晶矽薄膜形成一複晶矽薄膜,而缺陷則形成於該複晶矽薄膜晶粒的邊界。以p型主動區與n+摻雜的汲極與源極為例,當施加一負電壓於閘極且施加一正電壓於汲極時,該p型主動區內與該汲極交接處使電子從價電帶穿隧至導電帶,而電洞被主動區內的缺陷捕獲,在通道中形成能障,因而使該累積區電流變小,藉此可表示不同的邏輯狀態。本發明之記憶體係在電晶體關閉的狀態讀取該累積區電流,因此比習知記憶體(在導通時讀取)大幅降低功耗。本發明之記憶體為非揮發性記憶體,故不需刷新而能降低功率消耗。
A non-volatile memory is provided. The non-volatile memory comprises at least a silicon-on-insulator transistor including a substrate; an insulating layer disposed on the substrate; an active region disposed on the insulating layer; and an energy barrier device disposed in the active region and outputting a relatively small current when the non-volatile memory is read.
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專利簡述 / Intellectual Properties: |
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聯繫方式 / Contact: |
臺大產學合作總中心 / Center of Industry-Academia Collaboration, NTU |
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Email:ordiac@ntu.edu.tw |
電話/Tel:02-3366-9945 |
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