 技術摘要： |
An integrated circuit structure includes a semiconductor substrate, and a gate stack over the semiconductor substrate. The gate stack includes a high-k gate dielectric over the semiconductor substrate, and a magnetic compound over and in contact with the high-k gate dielectric. A source region and a drain region are on opposite sides of the gate stack. The gate stack, the source region, and the drain region are portions of a Metal-Oxide-Semiconductor (MOS) device.
|
聯繫方式 |
| 聯絡人：
研發處產學合作總中心 |
電話：
(02)3366-9949 |
|
| 地 址：
10617臺北市大安區羅斯福路四段1號 禮賢樓六樓608室 |
|
|
| |
|
專利行銷平台