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 使用切換電容校正注入式鎖定除頻器之5GHz CMOS頻率合成器(電晶體壓控振盪器及具有該電晶體壓控振盪器之頻率合成器)
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刊登日期：2014/05/21 |
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| ‧ 專利名稱 |
使用切換電容校正注入式鎖定除頻器之5GHz CMOS頻率合成器(電晶體壓控振盪器及具有該電晶體壓控振盪器之頻率合成器) |
| ‧ 專利證書號 |
I352508
US 7,741,923 B2
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| ‧ 專利權人 |
國立臺灣大學 |
‧ 專利國家
(申請日) |
中華民國 (2007/11/30)
美國 (2008/03/14)
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| ‧ 發明人/PI |
鄧平援 ,江簡富 ,
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| ‧ 單位 |
電信工程學研究所
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| ‧ 簡歷/Experience |
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| 技術摘要 / Our Technology： |
一種電晶體壓控振盪器及具有該電晶體壓控振盪器之頻率合成器，其中，該頻率合成器係採用一除五之注入式鎖定除頻器，該注入式鎖定除頻器係包含一五級反相器環型振盪除頻電路，以降低該振盪訊號之操作頻率，進而避免鎖相迴路頻率合成器因計數次數過多，導致能量之過度損耗；又該電晶體壓控振盪器包含由三組可切換之電晶體切換電容組相互並聯而成之並聯結構，又於各電晶體切換電容組之電晶體閘極分別接上操作電壓源，以切換各電晶體切換電容組之工作狀態，俾調整該壓控振盪器所產生之諧振頻率，使該壓控振盪器足以供給相對應且足夠頻寬之操作頻率。
A transistor voltage-controlled oscillator (VCO) and a frequency synthesizer having the transistor VCO are provided. The frequency synthesizer adopts a divide-by-five injection-locked frequency divider, which includes a five-stage inverter ring oscillating frequency dividing circuit for reducing the operating frequency of the oscillating signal from the VCO, thus decreasing power consumption due to counting operation of the frequency synthesizer. The transistor VCO includes three transistor switching capacitor sets connected in parallel to one another to form a parallel structure. The gates of the transistor switching capacitor sets are connected to respective operating voltage sources, so as to switch the status of the corresponding transistor switching capacitor set, which in turn adjusts the harmonic frequency generated by the VCO, thereby allowing the VCO to generate a corresponding operating frequency with enough bandwidth.
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| 專利簡述 / Intellectual Properties： |
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聯繫方式 / Contact： |
| 臺大產學合作總中心 / Center of Industry-Academia Collaboration, NTU |
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| Email：ordiac@ntu.edu.tw |
電話/Tel：02-3366-9945 |
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