 技術摘要 / Our Technology： |
An integrated circuit structure includes a semiconductor substrate, and a gate stack over the semiconductor substrate. The gate stack includes a high-k gate dielectric over the semiconductor substrate, and a magnetic compound over and in contact with the high-k gate dielectric. A source region and a drain region are on opposite sides of the gate stack. The gate stack, the source region, and the drain region are portions of a Metal-Oxide-Semiconductor (MOS) device.
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| 專利簡述 / Intellectual Properties： |
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聯繫方式 / Contact： |
| 臺大產學合作總中心 / Center of Industry-Academia Collaboration, NTU |
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| Email：ordiac@ntu.edu.tw |
電話/Tel：02-3366-9945 |
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專利行銷平台